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1992-11-23
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| Title ArmSI application - Speed Indexer for Acorn RISC machines
| Authors J.Abbott & Nick Smith
| Version 3.31H (21-Nov-92)
| Status Public Domain, no distribution restrictions
Welcome to the all-new !ArmSI application - it was developed from !SI
v3.12 (written by 'J.Abbott') by Nick Smith to give a range of
interesting machine speed indexes for Acorn RISC machines.
Versions postfixed by H (for Hack 8-) are modified by Nick Smith because
!SI 3.12 was pretty poorly written I felt, and needed some work done
in a few places (user interface, RAM speed checks, etc) Once I started
on fixing the bugs, I began to think of lots of things to add to the
program ...
Thanks go to Owen Smith for ideas, some tech information & helping test
out some of the stranger hardware configurations. Thanks also to some
wonderful beta-testers; Paul Fidler & Holger Klingspohr.
I would be most interested in talking to Mr Abbott about !SI, but he
didn't bother to put his address in the original documentation - so I
have no way of getting in contact with him ! For the original authors'
comments - see the end of this file.
Note that to run the Dhrystones test you need ;
- Version of the SharedCLibrary v3.75 or greater
- The disc with !ArmSI in the drive (because it is a separate command)
Note that to run any FP computations you need ;
- Some version of the FPEmulator loaded
If you load some old SI file into !ArmSI, then many of the fields in
the main window will not be available because that information wasn't
saved by !SI. Also, if you load some SI/ArmSI file from another
machine, then remember to use 'Re-calculate' before playing around
with any improvements.
Some example SI files are including for your interest - ranging from
the lowest 1MB A310 (5900 Dhrystones) all the way up to my 'turbo'
A5000 (over 25000 Dhrystones 8-) ... Note my A5000 can run at 16.6MHz
RAM (*big* speed increase), but I don't currently have a RAM upgrade
card that can hack it ...
Users of old !SI may notice that the option to turn DRAM refresh on
or off has gone. In fact turning off DRAM is extremely dangerous -
and on some types of system/RAM chips can completely corrupt your
memory. So I decided to take the safe path, and remove all the code
which turns DRAM refresh on or off - keep it set to the RISC OS
default - you know it makes sense !
*** Wish list
- Complete rewrite in C ?? This BASIC code is so disgusting !
- More accurate calculations of everything
- Support for VIDC20 8-)
- Some timings for the new FPA chip (I am sure most of the
indexes will be right off the window !)
- Standard Whetstone (FP-Dhrystone) test
- Proper filetype from Acorn
- Option to turn ARM600 write buffer & cache on/off
- BASIC/BASIC64 FP performance test
- ID for VIDC enhancer, as well as different graphics cards
- Disc I/O performance tests + index
- A decent BASIC benchmark - any offers ??
*** Known bugs
If you can help me track these down (or even give me reproducable
circumstances) then I would be most grateful.
- Sometimes the FPEmulator doesn't like being RMFaster'd, although
I cannot duplicate the problem on my machine.
- Sometimes stupid FP results are given - again I can't reproduce
the problem ... So if you see an EXP of 0.72 and a SIN of 11.12
then it is probably messed up !
*** Contacts
Please send me any bugreports, comments, ideas for new features, etc.
I can be contacted at the following address, at least until Jul '94 ;
Nick Smith
Churchill College
Cambridge
CB3 0DS nas20@uk.ac.cam.phx (JANET/Internet email)
*** Distribution
This software is 'Public Domain'. You may copy and distribute it
without restriction - include it on magazine discs, with commercial
products (eg, ARM3 upgrades), etc, etc. I you do include it with
commercial hardware, I'd really like to know about it too.
*** Revision history
Modifications to v3.20H (05-Nov-92)
- Removed all line number references in BASIC code (first job in any
BASIC hack!)
- Made iconbar menu appear in correct place!
- Misc mods to templates
- Did new code to read RAM speed - old stuff was rubbish I think (at
least it never returned anything useful for >8MHz memory)
- Possibly removed RO2.xx compatibility - oh well 8-)
- Changed ROM speed reading code based on speed of memory speed (ie,
memory system clock)
Modifications to v3.21H (07-Nov-92)
- Restructured application - moved Templates & Code to a 'Resources'
directory.
- Added 'Dhrystone' benchmark to application - uses standard Dhrystone
version 2.1 (May 25, 1988) with no optimisations
Full source is included, as is a Makefile for recompilation with
different settings
- Generally did lots of code tidying & documentation
- Re-did main 'System Information' window, renumbering icons as I went
to tidy up redraw (argh - icons should be numbered from 0 at top -> )
- Added 'Available ROM' (shows 5th column ROM info too)
- Added display of ROM speed (2,3,4 ticks, or Page mode access)
- Added 'IOEB chip set information'
- Added FPA coprocessor recognition
- Added 'Additional details:' section ;
RISC OS version
Video screen mode, resolution, colours & refresh rate
Unique machine ID reading
Floating point identification (Old FPE, New FPE, FPPC, FPA chip)
Dhrystone results (microseconds/loop, dhrystones/sec)
- Did all this silly documentation (!)
- Now wasn't all this more useful than going to a 'Use of the IBM 3084
mainframe' lecture ?? 8-)
Modifications to v3.22H (08-Nov-92)
- Generally wrote the support code for all the above features which
didn't get done yesterday ...
- Integrated the Dhrystone index into the application (or at least it
gets run by the main application)
- Added recognition of FPPC (Old Acorn FP card)
- Renumbered some more icons to fix icon delete/recreate problems
- Added snazzy 'machine identification' code which guesses your
machine type
- Recalibrated ARM instruction indexes based on 1.000 being an old
1MB A310 (MEMC1, 8MHz ARM2), rather than the previous 'perfect' ARM2
whatever that might have been !
Modifications to v3.23H (09-Nov-92)
- Fixed so that prompts for disc with Dhrystone command to be
inserted (*before* video DMA turned off!)
- Reduced no. of Dhrystone loops so not so slow on ARM2
- Recalibrates old SI files when loaded so that 1.00 = 310, 8MHz ARM2
- Removed all the 'MOVNV R0,R0' instructions in app, now MOV R0, R0
- Added ARM250 processor recognition (for A3010/3020/4000/etc)
- Reads MEMC type from zero page in SVC mode (in case users/OS have
zero page protected)
- Open main window on a load operation of SI file
- Improved error messages & error handling (what sort of idiot defines
an error block of 64 bytes ?? sigh)
- Closes menu on saving via key press/mouse click
- Extended window widths to allow for the higher speeds that I am
getting ... Almost certainly not enough for the FPA when it arrives!
Modifications to v3.24H (10-Nov-92)
- Renamed to !ArmSI because I felt it was a more identifiable name,
and it also distinguishes the program from the original !SI app.
- Identifies ARM2as/ARM61 processors (cannot tell the difference)
- Identifies ARM600/610 or ARM600 processors
- Changed ROM speed terminology - should be 'n-cycles'
- Sent out to a few people for a little bit of testing ...
- New Sprites, and a !Sprites22 file.
- Now identifies A500 (A310 protoype), with a VIDC1 chip
Modifications to v3.25H (11-Nov-92)
- Improved !Sprites22, but they still aren't very good !
- Added some more improvements ;
*RMFaster BASIC on/off
*RMFaster FPEmulator on/off
ARM3 cache on/off
Yes - you can *RMFaster BASIC in the middle of a BASIC program
(well I was impressed!) Note that the FPEmulator can only be
RMFaster'd if you have it in ROM (RO3.xx owners)
- Made sure that all zero page reads are done from SVC mode
- Because of the new facilities, 3.25 cannot read the SI files
created with 3.20->3.24 (although it can read 1.xx, 2.xx and
pre 3.20), because it seemed too much effort - there hasn't
been a public release yet, and there is a new file format every
day !
- ADJUST-click on icon bar open FP info window
Modifications to v3.26H (13-Nov-92)
- Now shouldn't moan on startup if you have no FPEmulator module
present.
- Strange problem with DRAM refresh changing at random points -
think it fixed now. Probably due to Mr.Abbott's enthusiastic
use of real variables when he should have been using integers!
- A500 test had to be changed. Looks like the OS frigs the RTC
calls 8-( So now uses the keyboard ID, instead of the RTC
precision.
- Memory bandwidth/Video bandwidth/etc calculations should now
be more accurate. The memory bandwidth is based on 1 n-cycle +
3 s-cycle RAM access, and so will actually give lower results
than previous versions.
The video/dram refresh calculations now take into account the
refresh rate of the screen (!) and also use the better memory
bandwidth value.
- Slightly more accurate video refresh code, but it looks like I
am underestimating both refresh rate & video bandwidth values
slightly ...
- Far too much debugging to get the code to work on a 1MB, RO2,
MEMC1, ARM2 A310 8-(
Modifications to v3.27H (16-Nov-92)
- Now reads total RAM size sensibly (uses OS_ReadMemMapInfo)
to correctly identify >4MB
- Moved all the Bxx% variables (for bar icon nos) into an array
- Lots of code documentation, tidying up & LOCAL variables ...
If you think the code is messy now, you should have seen 3.12 !
- Now echoes unrecognized key presses with Wimp_ProcessKey
- Paged mode access ROMs option is always greyed out under OS3
Modifications to v3.30H (18-Nov-92)
- Better ARM610 identification (processor type=&61)
- Complete removal of DRAM refresh code (serious side effects can
occur) Still reports the DRAM refresh status, but doesn't let
you change it.
- Replaced the DRAM refresh menu option with one for Video DMA,
so that during tests you can either have the video DMA turned off
or on. Old versions always turned off Video/Sound DMA for max
speed ratings !
- RAM size now displays page size, and number of pages. (eg, ARM600
has 4K pages, while old MEMC1/1a machines will have 8, 16 or
32K pages)
- Final beta-release before the public release.
Modifications to v3.31H (21-Nov-92)
- Some final small changes for the first public release (wow!) ;
- ID's PCATS graphics enhancer card
- Clicks to open windows opens them at top of window stack
- Compiled a nice collection of SI files from different machines
- Fixed 5th Column ROM reading code (thanks to Owen making me my
own custom 5th column ROM!)
- Increased the number of Dhrystone loops performed from 50,000
to 75,000 - my A5000 at top speed goes too fast for 50,000 to
have accurate results !! 8-)
- Public release #1 to Newcastle info-server & comp.binaries.acorn
*** Techie details
Below I briefly detail how each section of SI gives its results - for
more details look at the code. The important routines are PROCcalcsi
and PROCdisplaysi.
Available RAM - MEMC tells you the page size, and so total RAM can be
easily worked out. Uses OS_ReadMemMapInfo call.
Available ROM - tricky ... Currently we just guess based on the OS
version.
5th Column ROMs - you don't notice this feature unless you have
5th column ROMs, but the program finds the number of extension
ROMs with Podule_ReturnNumber, and then counts the total size
of code/data using Podule_EnumerateChunksWithInfo - so you
get the cumulative total of data - not the capacity of the
ROMs when full ...
ROM Speed - we know the number of n-cycles per ROM access (from MEMC),
so this is multiplied by the current RAM Speed.
RAM Speed - the operating system works this out on startup, and so we
just ask nicely (zero page location).
DRAM refresh - a MEMC returned result (you use OS_UpdateMEMC SWI for
all these MEMC read/writes)
MEMC type - zero page location gives MEMC1 or MEMC1a type, as worked
out by the OS.
IOC type - unknown - call it IOC1 !
IOEB type - under RO3.xx an OS_ReadSysInfo call returns this, and
whether one is present or not. IOEB can only exist on RO3.xx
and greater machines.
VIDC type - assume a VIDC1a (most machines), unless an A500 computer.
The A500 is ID'd using the fact that 99% of all the A500s
have RTCs with 30 second precision. A500s have VIDC1 chips.
Actually this test doesn't work because of the OS simulating
the RTC 8-( Instead we use the keyboard ID byte ... If you
have an A500 with a new keyboard - tough!
ARM type - see the assembler code at the end of the main program.
ARM1 chips don't do multiply, ARM2 chips don't do SWP
instructions, ARM250 chips don't have coprocessor 15
(internal), and all later chips can be ID'd from a status
register inside coprocessor 15.
FPA type - Again, a coprocessor transfer as defined in the Acorn
FP specs (see PRMs) which can ID software/hardware FP
details.
Periph Ctrlr - OS_ReadSysInfo call under RO3 can ID the 82C710 or
82C711 peripheral controller chip which handles the IDE
interface, etc.
LCD ASIC - only present in A4 portables, this chip does the
fancy 15-greyscale display, and is ID'd using OS_ReadSysInfo
RO ver - Read from OS_Byte,0,0
Video screen mode - read from the BASIC 'MODE' command, and a
selection of OS_ReadModeVariable calls
Unique machine ID - only present on modern RO3 machines (A3010/3020/
A4000/5000/A4/etc) read using OS_ReadSysInfo call
Details of most of the calls listed above can be found in the RISC OS3
Programmers Reference Manual, available from your local Acorn Dealer 8-)
========================================================================
Original Authors Notes:-
1) Instructions timings are accurate to within:
4 * MCLK
--------
i
where
i is the number of instructions tested
MCLK is the system clock (125 nS on an 8 MHz machine)
ARM instructions are therfore calculated to within 2 nS +- 2%
2) ARM Speed in MIPS is calculated as the average number of each
instruction Group in a test sample of 1000 instructions
3) IOC and VIDC types remain Unknown at present
4) Checks are made for all processors known to date. ie. ARM 1,2 and 3
5) Interrupts and DMA requests are stopped whilst calculations are
taking place
6) Looped instructions are calculated as one instruction of the specific
Group + one Group 1 + one group 4 instruction
7) Instruction timings are calculated during Video Flyback, and are
therefore dependant on the Video Flyback period and DRAM refresh
(large modes with no vertical boarders will affect results)
8) Group 1a results on ARM 2's do not take account of the hardware bug
(instructions take 24 S cycles rather than the maximum of 16)
9) Instruction indexes are relative to a perfect ARM 2 running at 8 MHz
10) FPU instruction speeds are calculated by either 3, 16 or 80
instructions depending upon the instruction in question.
11) FPU instructions are calculated to within 167 nS, 31 nS or 6 ns +- 2%
dependent upon the instruction
11) FPU indexes include both register values and immediate values in the
form #1.0
12) FPU speed in FLOPS is calculated as the total number of instructions
divided by the time taken, this does not take account of common
instructions
13) All FPU calculations with the exception of STF and LDF are done in
extended precision. STF and LDF are packed decimal precision
Modifications to v1.00
- Group 4 index
- Looped instruction indexes
Modifications to v2.00
- FPU indexes
Modifications to v3.00
- Improved icon updating
Modifications to v3.04
- Check FPU/FPEmulator present
Modifications to v3.07
- Improved Group 4 looped instruction index
- Improved FPU instruction timings
Modifications to v3.09
- Improved window handling
- Modified bandwidth calculations for ARM 2 machines
========================================================================